In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve these high densities there has been and continues to be efforts toward scaling down device dimensions (e.g., at submicron levels) on semiconductor wafers. In order to accomplish such high device packing density, smaller and smaller features sizes are required. This may include the width and spacing of interconnecting lines, spacing and diameter of contact holes, and the surface geometry such as corners and edges of various features.
The requirement of small features with close spacing between adjacent features requires high resolution photolithographic processes. In general, lithography refers to processes for pattern transfer between various media. It is a technique used for integrated circuit fabrication in which a silicon structure, is coated uniformly with a radiation-sensitive film, the resist, and an exposing source (such as optical light, x-rays, or an electron beam) illuminates selected areas of the surface through an intervening master template, the mask, for a particular pattern. The lithographic coating is generally a radiation-sensitive coating suitable for receiving a projected image of the subject pattern. Once the image is projected, it is indelibly formed in the coating. The projected image may be either a negative or a positive image of the subject pattern. Exposure of the coating through a photomask causes the image area to become either more or less soluble (depending on the coating) in a particular solvent developer. The more soluble areas are removed in the developing process to leave the pattern image in the coating as less soluble polymer.
Due to the extremely fine patterns which are exposed on the photoresist material, thickness uniformity of the photoresist material is a significant factor in achieving desired critical dimensions. The photoresist material should be applied such that a uniform thickness is maintained in order to ensure uniformity and quality of the photoresist material layer. The photoresist material layer thickness typically is in the range of 0.1 to 3.0 microns. Good resist thickness control is highly desired, and typically variances in thickness should be less than .+-.10-20 .ANG. across the wafer. Very slight variations in the photoresist material thickness may greatly affect the end result after the photoresist material is exposed by radiation and the exposed portions removed.
Application of the resist onto the wafer is typically accomplished by using a spin coater. The spin coater is essentially a vacuum chuck rotated by a motor. The wafer is vacuum held onto the spin chuck. Typically, a nozzle supplies a predetermined amount of resist to a center area of the wafer. The wafer is then accelerated to and rotated at a certain speed, and centrifugal forces exerted on the resist cause the resist to disperse over the whole surface of the wafer. The resist thickness obtained from a spin coating process is dependent on the viscosity of the resist material, spin speed, the temperature of the resist and temperature of the wafer.
After the resist is spin coated and selectively irradiated to define a predetermined pattern, the irradiated or unirradiated portions are removed by applying a developer. The developer is also spin coated onto the wafer by applying developer across the resist and then spin coating the developer until centrifugal forces disperse the developer over the coating of resist. However, the developer is not always uniformly dispersed on the wafer because the of the difference of the surface area on the outer peripheral portion of the wafer in comparison to the center portion of the wafer. This may cause overdeveloping of the center portion of the resist on the wafer forming a developed resist layer with a thickness that is smaller at the center than at the outer peripheral surfaces. The result is the predetermined photoresist pattern cannot be formed.
The above stated problems even occur for nozzles that are designed to dispense developer more uniformly, such as a multiple tip dispensing nozzles. Typically, a multiple tip dispensing nozzle includes a chamber for receiving developer that distributes developer to a plurality of nozzles distributed over the length of the nozzle, which extends the diameter of the wafer. FIGS. 1a and 1b illustrate typical problems that can occur in applying developer to a resist on a wafer with a multiple tip nozzle. A multiple tip nozzle 10 is coupled to a pivotable arm 12 that pivots from a rest position 11 to an operating position 15. In the operating position 15, the multiple tip nozzle applies a developer 30 on a resist layer 24 disposed on a wafer 22. The wafer 22 is vacuum held onto a rotating chuck 20 driven by a shaft 26 coupled to a motor 28. The wafer 22 with its coating of resist 24 is rotated at a constant speed and developer 30 is applied through a plurality of tips 14 along a central axis through of the resist layer 24. The tips 14 are aligned at different points along the central axis to apply developer along different annular rings (not shown). The developer 30 flows outward from each annular ring covering the entire top surface of the resist layer 24. FIG. 1a illustrates an example of the problems that can occur after the developer with the irradiated resin portions are spun off the wafer and/or rinsed off the wafer. The center portion of the resist is exposed to more developer due to puddling in the center region of the wafer. As a result, a groove 18 is formed in the central region of the resist resulting in a non-uniformly exposed wafer.
FIG. 1c illustrates a proposed solution for the above described problem. The nozzle 10 is offset from the central axis of the resin 24, so that puddling does not occur in the center of the resist layer 24. This solves the problem with puddling in the central region of the resist layer 24, but due to offset portion lagtime, one side of the wafer receives more developer than the other. FIG. 11d illustrates that the exposed resist layer 24 includes a first surface 34 that is more exposed than a second surface 32 causing a difference in the thickness of the resist 24 along the first and second surface. Again, this undesireability causes a non-uniformly exposed wafer.
The resulting developed resist layers illustrated in FIGS. 1b and 1d do not have uniform thicknesses which may lead to impaired device performance. In view of the above, a system/method is needed, for dispensing a uniform layer of developer across a resist formed on a wafer.